DOCEA Power provides Aceplorer , the first electronic system level (ESL) solution for the modeling, exploration and optimization of power and thermal behavior of any electronic systems architecture. The solution answers the needs of system architects in charge of power optimization of on-chip (SoCs, SiPs, FPGAs, ASICs) or on-board (embedded systems) designs. ACE stands for abstract concept of energy which models the power in multi-state designs in an efficient manner. Aceplorer models and estimates power consumption, and since at this level the simulations are so fast, Aceplorer allows a true exploration of the design space in order to optimize power consumption.
Aceplorer allows the modeling of heterogeneous systems, with any mix of digital, analog or mixed signal blocks, and with different levels of model complexity. The result is a larger exploration of the design space for the best low power implementation strategy, which can take into account the embedded software impact on the design power consumption.
In The News
DATE 2012 (Design, Automation & Test in Europe), Booth No. 8
March 12-16, 2012 – Dresden, Germany
SNUG (Synopsys Users Group)
March 26-28, 2012 – Santa Clara (CA), USA
49th DAC (Design Automation Conference), Booth No. 1702
June 3-7, 2012 – San Francisco (CA), USA
I had a chance to catch up with Ghislain Kaiser, CEO of Docea Power, a promising new startup based in France. Their product, Aceplorer, has been gaining increasing acceptance in the power and thermal management space.
