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FloorDirector

Solutions

FloorDirector is a true state-of-the-art ASIC backend tool, which features unique capabilities, robust functionality and a soft learning curve. MMMC operation, seamless design flow integration and flexible reference flows are just some of the aspects of the technology that we take for granted.

Multi-Mode-Multi-Corner (MMMC)

FloorDirector provides true Multi-Mode, Multi-Corner, and Multi-Use-Case operation. While multi-mode capabilities are a given in state-of-the-art EDA tools, multi-corner was a natural progression as Teklatech introduced Frequency Domain Optimization – the ability to specify power noise reduction directly as a noise spectrum target. And while it is of some significance for peak reduction, multi-corner is key to precisely control and optimize frequency response and slope of the current pulse.

Multiple Optimization Targets

In addition to full support of Multi-Mode/Corner/Use-Case, FloorDirector allows a designer to apply multiple concurrent optimization targets to all key metrics, across all modes, corners and use-cases, in a simple coherent way. For example, the backend designer can choose to target a noise reduction at 850MHz in the Rx functional mode while simultaneously reducing noise at 1900MHz in the Tx functional mode, while also improving power integrity by reducing current peaks in scan mode, all the while maintaining the timing targets needed for design closure across all modes and corners. FloorDirector will take all use-cases and scenarios into account, and determine one single solution, for one common clock tree implementation, that will meet this complex balance of constraints in all modes of operation.

Non-Intrusive Optimization Approach

FloorDirector is designed as a non-intrusive tool, which will adapt easily to an existing EDA flow. Files needed for an optimization are SDC, SDF, Verilog gate-level netlist, LEF (all mandatory) plus DEF and VCD files (optional). The analysis and optimization will generate a set of Clock Tree Synthesis directives, which drive your existing CTS tool to implement a clock tree with precisely scheduled latency offsets. This will effectively reduce the peak current and power noise as desired, but not generate a clock tree overhead or introduce timing violations.

Proven with Mainstream CTS Solutions

Since 2008, Teklatech has been working actively with other EDA suppliers, to ensure our solution’s compliance with mainstream CTS solutions. Today, we have vast experience with supporting FloorDirector users using backend flows from key EDA vendors Cadence®, Synopsys®, Magma®, and more. For Magma, we are supporting both Talus version 1.1 and 1.2, and due to customer demand we have recently added support for ATopTech’s Aprisa solution as well. We are committed to support the needs of our customers, and other CTS flows can quickly be added as we move forward.

Static Timing Analysis

Timing is imperative, and FloorDirector fully complies with any advanced timing requirements from SDC, or set up in FloorDirector directly. Timing will not be violated, as FloorDirector makes use of a full, natively implemented STA engine. In the course of an optimization, timing will be honored during each and every one of the optimization phases.

In fact, because of the STA engine, FloorDirector can even fix or solve difficult timing violations – typically associated with large macro’s or RAM blocks – before the actual power noise optimization starts. These are native FloorDirector features, and can be achieved easily by setting up targets accordingly.

Clock Tree Size

FloorDirector analyzes the clock architecture of a design closely during an optimization. It re-calculates the estimated size of the resulting clock tree concurrently and continuously, and evaluates this against the optimization targets. While it might appear counter-intuitive, a CTS solution generated by FloorDirector, with improved power integrity and lower power noise, will not create a larger clock tree. On the contrary, the clock tree is often seen to become smaller compared with the clock tree in a standard design implementation.

In summary, using FloorDirector is a fast and robust way to improve your design. We have addressed many of the above topics in more detail in our Frequently Asked Questions (FAQ) section, simply follow the link below.

 

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